2 posts tagged with "AI Accelerator"

On January 5, 2026, on the opening day of CES 2026 (Consumer Electronics Show), AMD Chair and CEO Dr. Lisa Su unveiled in her keynote: the Instinct MI400 series AI accelerators.

The most eye-catching is MI455X — AMD's most powerful AI accelerator ever, using a 2nm + 3nm hybrid process, 432GB HBM4, with FP4 compute up to 40 PFLOPS (20 PFLOPS FP8).

Key highlights​

• MI455X: FP4 40 PFLOPS, FP8 20 PFLOPS, 10× over MI355X
• MI450: cost-performance version, FP4 28 PFLOPS, 288GB HBM4
• Process upgrade: world's first AI chip with 2nm + 3nm hybrid process (GCD on 2nm, MCD on 3nm)
• Memory upgrade: from MI350X's 288GB HBM3e to 432GB HBM4 (MI455X)
• Bandwidth upgrade: from MI350X's 8 TB/s to 19.6 TB/s (2.45×)
• Architecture upgrade: from CDNA 4 to CDNA 5
• Mass production: MI455X Q4 2026, MI450 Q3 2026

Full MI400 series specs​

📌 Important correction (2026-06-16): After official spec verification, MI455X memory is 432GB HBM4 (not the earlier reported 288GB), and FP4 compute is 40 PFLOPS. Corrected herein.

Model	Positioning	Memory	FP4 compute	FP8 compute	TDP (est.)
MI455X	Flagship training+inference	432GB HBM4	40 PFLOPS	20 PFLOPS	~1,000W
MI450	Cost-performance training	288GB HBM4	28 PFLOPS	14 PFLOPS	~800W
MI440X	Enterprise inference	216GB HBM4	25 PFLOPS	12.5 PFLOPS	~600W
MI430X	HPC / scientific computing	192GB HBM4	20 PFLOPS	10 PFLOPS	~500W
MI400X	General / edge inference	128GB HBM4	12 PFLOPS	6 PFLOPS	~400W

Key upgrades (vs MI350 series):

• Memory: HBM3e → HBM4, capacity +50% (432GB vs 288GB)
• Bandwidth: 19.6 TB/s (vs MI350's 8 TB/s, +2.45×)
• Compute: FP4 40 PFLOPS (vs MI355X's 20 PFLOPS, +2×)
• Process: 2nm + 3nm hybrid (GCD on 2nm, MCD on 3nm)
• Architecture: CDNA 5 (vs MI350's CDNA 4)

Performance vs. MI355X​

Metric	MI355X (2025)	MI455X (2026)	Improvement
FP4 compute	20 PFLOPS	40 PFLOPS	2×
FP8 compute	10 PFLOPS	20 PFLOPS	2×
Memory capacity	288GB HBM3e	432GB HBM4	1.5×
Memory bandwidth	8 TB/s	19.6 TB/s	2.45×
Process	TSMC 3nm	2nm + 3nm hybrid	New gen
Architecture	CDNA 4	CDNA 5	New gen
TDP	800-1000W	~1,000W	Flat

Lisa Su at CES 2026:

"Four years ago, MI250's AI performance was X. Today, MI455X's performance is 1000× that. That's the pace of AI chip progress."

CDNA 5 architecture in detail​

The MI400 series adopts the CDNA 5 architecture (MI355X uses CDNA 4):

Key upgrades​

1. Matrix Core upgrade: FP8/INT8/FP16 support, sparsity acceleration
2. HBM4 controller: 12-layer HBM4 (vs HBM3e's 8 layers)
3. Infinity Fabric 4.0: 50% higher die-to-die / die-to-GPU bandwidth
4. Native sparsity support: MoE Expert-Parallel optimization
5. Long-context optimization: 1M+ token KV Cache acceleration

vs. NVIDIA Blackwell / Rubin​

Metric	AMD MI455X	NVIDIA B200	NVIDIA Rubin R200 (2026 Q4)
FP4 compute	40 PFLOPS	20 PFLOPS (45 sparse)	~40 PFLOPS (est.)
FP8 compute	20 PFLOPS	10 PFLOPS (22.5 sparse)	~20 PFLOPS (est.)
Memory	432GB HBM4	192GB HBM3e	288GB HBM4
Memory bandwidth	19.6 TB/s	8 TB/s	13 TB/s
TDP	~1,000W	700-1000W	~1,000W
Process	2nm + 3nm hybrid	TSMC 4np	TSMC 3nm
Mass production	2026 Q4	2024 Q4	2026 Q4
Software ecosystem	ROCm	CUDA	CUDA
Strength	Memory capacity, open ecosystem	Most mature ecosystem	Next-gen architecture
Weakness	Software ecosystem gap	Smaller memory	Not yet launched

Conclusion: MI455X leads B200 in FP4/FP8 compute and memory capacity/bandwidth, but software ecosystem remains a weak point. Versus Rubin R200, paper specs are close, but Rubin has the CUDA ecosystem moat.

Production timeline​

Time	Event
June 12, 2025	MI400 series specs first announced at Advancing AI
January 5, 2026	MI455X/MI450/MI440X formally launched at CES 2026
2026 Q3	MI450 sampling begins
2026 Q4	MI455X mass production
2026 Q4	MI440X (enterprise inference) launched
2027 Q1	MI430X/MI400X (HPC/edge inference) launched
2027	MI500 series (next gen)

AMD AI chip roadmap (2025-2027)​

Time	Product	Process	Notes
Q4 2024	MI325X	TSMC 5nm	HBM3e upgraded
Q3 2025	MI355X (MI350 series)	TSMC 3nm	CDNA 4, 288GB HBM3e
Q4 2026	MI455X (MI400 series)	2nm + 3nm hybrid	CDNA 5, 432GB HBM4
Q1 2027	MI500 series	TSMC 2nm (est.)	Next gen, further gains

Software ecosystem: ROCm's progress and challenges​

✅ Progress​

• PyTorch 2.5+: native MI300X/MI455X support
• Hugging Face Transformers: official AMD GPU support
• vLLM 0.8+: MI300X inference support (experimental)
• JAX: AMD adapting (vs Google TPU)

⚠️ Challenges​

• Framework optimization: PyTorch on AMD GPUs still below NVIDIA
• Operator coverage: some niche operators need hand-written HIP
• Multi-card communication: RCCL (vs NCCL) still lags
• Developer ecosystem: tutorials, cases, community activity far below NVIDIA

Competitive comparison​

Vendor	Product	FP4 compute	Memory	Mass production	Strength	Weakness
AMD	MI455X	40 PFLOPS	432GB HBM4	2026 Q4	Largest memory, open ecosystem	Software gap
NVIDIA	B200	20 PFLOPS	192GB HBM3e	2024 Q4	Most mature ecosystem	Smaller memory
NVIDIA	Rubin R200	~40 PFLOPS	288GB HBM4	2026 Q4	Next-gen architecture, CUDA	Expensive
Huawei	Ascend 910C	~1.6 PFLOPS	64GB HBM	2026 Q2	China-localized	Export-controlled
Google	TPU 8t	~9.2 PFLOPS	~256GB HBM3e	Late 2027	Gemini-integrated	Google Cloud only

Industry impact​

1. Impact on NVIDIA​

On paper, AMD MI455X has already caught up to B200 (FP4 40 PFLOPS vs 20 PFLOPS), even leading substantially in memory capacity (432GB vs 192GB).

But:

• NVIDIA has the CUDA ecosystem moat
• NVIDIA has the Vera Rubin platform (full solution, 2026 Q4)
• AMD only sells cards/nodes, NVIDIA sells AI factories
• MI455X mass production (2026 Q4) coincides with Rubin R200 — head-on competition

2. Pressure on domestic chips​

MI455X's launch means: mainstream international AI chips enter the 2nm + HBM4 era in 2026.

Domestic chips (Huawei Ascend, Cambricon, MetaX, etc.) need to:

• Catch up to 5nm + HBM3e by 2026-2027
• Otherwise the gap widens from "1 generation" to "2 generations"

3. Significance for cloud providers​

MI455X gives cloud providers a second option beyond NVIDIA:

• Microsoft Azure: already deployed MI355X, may follow with MI455X
• Google Cloud: in-house TPU, won't use AMD
• Amazon AWS: in-house Trainium/Inferentia, won't use AMD
• Alibaba Cloud, Tencent Cloud: may procure MI455X as NVIDIA alternative

Related chips​

• AMD MI455X - the new launch
• AMD MI300X - previous flagship
• AMD MI325X - HBM3e upgraded
• NVIDIA B200 - direct competitor
• NVIDIA Rubin R200 - same-generation competitor

References​

• MI455X chip - Baidu Baike - official specs
• AMD drops its most powerful two-gen AI chips! World's first 432GB HBM4 - Zhihu - on-site report
• Taking on NVIDIA: AMD launches MI440X for enterprise AI data centers - Tencent News
• AMD MI400 packs 432GB HBM4: specs crush NVIDIA on paper - CocoLoop
• AMD CES 2026 keynote replay

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This article is compiled from AMD CES 2026 official announcements, Baidu Baike, and Zhihu on-site reports; specs verified against official sources. Updated 2026-06-16: corrected MI455X memory (288GB → 432GB) and compute (FP8 6 PFLOPS → FP4 40 PFLOPS).

On March 18, 2026, Intel officially launched at the Intel AI Summit: the Habana Gaudi 4 custom AI accelerator. This is Intel's latest-gen AI training/inference chip after Gaudi 3 (launched April 2024), designed for large-scale model training.

Meanwhile, Intel confirmed its next-gen Jaguar Shores GPU (datacenter GPU) is in development, will use HBM4 memory, and is expected in 2027. This marks Intel's formal return to the AI chip race.

Key Highlights​

• Gaudi 4: Launched March 2026, TSMC 5nm, 64GB HBM3e, for large-scale training
• Jaguar Shores: Launches 2027 (est.), HBM4, targeting NVIDIA Rubin
• Crescent Island: Intel's first general-purpose GPU (launched 2026), Xe3 architecture
• Software ecosystem: Intel AI Stack (including oneAPI, BigDL, Gaudi Software Suite)
• Foundry partners: TSMC (Gaudi 4, Jaguar Shores), Intel Foundry (Crescent Island)

Gaudi 4 Detailed Specs​

Gaudi 4 is the fourth-gen AI accelerator designed by Intel's Habana Labs (acquired 2019).

Parameter	Gaudi 4	Gaudi 3 (2024)	NVIDIA B200
Architecture	Habana 4	Habana 3	Blackwell
Process	TSMC 5nm	TSMC 7nm	TSMC 4NP
FP8 compute	~2,000 TFLOPS (est.)	1,000 TFLOPS	4,500 TFLOPS (sparse)
Memory	64GB HBM3e	128GB HBM2e (est.)	192GB HBM3e
Memory bandwidth	~3 TB/s (est.)	~2 TB/s (est.)	8 TB/s
TDP	~500W (est.)	~400W	700-1000W
Interconnect	RoCE v3 (Ethernet)	RoCE v2	NVLink 5.0
Launch	March 2026	April 2024	March 2024
Mass production	2026 Q3 (est.)	Q4 2024	Q4 2024

📌 Note: Gaudi 4 exact specs not fully public; some values above are estimates.

Gaudi 4 Key Features​

1. Native Ethernet support: Uses RoCE v3 (RDMA over Converged Ethernet), no dedicated interconnect protocol needed (like NVLink)
2. Large-scale scaling optimized: Ten-thousand-card cluster scaling efficiency better than InfiniBand (lower cost)
3. Sparsity acceleration: Native MoE model support
4. Multi-precision support: FP8/FP16/FP32/INT8/INT4
5. Open ecosystem: Supports PyTorch, TensorFlow, JAX (via third-party adaptation)

Jaguar Shores: Intel's Next-Gen GPU​

Jaguar Shores is Intel's first true datacenter GPU (not an ASIC like Gaudi).

Why "Jaguar Shores"?​

• Jaguar: Symbolizes "speed" and "agility"
• Shores: Symbolizes "openness" and "connection"

Jaguar Shores Estimated Specs​

Parameter	Jaguar Shores (est.)	NVIDIA Rubin	AMD MI455X
Architecture	Xeu 3 (est.)	Rubin	CDNA 4
Process	TSMC 3nm (est.)	TSMC 3nm	TSMC 3nm
Memory	HBM4 (confirmed)	HBM4	HBM4
Memory capacity	288GB (est.)	288GB	288GB
FP8 compute	~4,000 TFLOPS (est.)	~6,000 TFLOPS	6,000 TFLOPS
TDP	~800W (est.)	~1,000W	~800W
Launch	2027 (est.)	2026 Q3	2026 Q3

Key confirmations:

• ✅ HBM4 memory: Intel confirmed Jaguar Shores will use SK hynix HBM4
• ✅ TSMC foundry: Jaguar Shores will be produced by TSMC (not Intel Foundry)
• ✅ oneAPI native support: Jaguar Shores will natively support the oneAPI programming model

Crescent Island: Intel's First General-Purpose GPU​

Crescent Island is Intel's first general-purpose datacenter GPU announced October 2025, using the Xe3 architecture (upgrade of Xe-HPG).

Parameter	Crescent Island (est.)	Intel Data Center GPU Max	NVIDIA L40S
Architecture	Xeu 3	Xeu 2 (Ponte Vecchio)	Ada Lovelace
Positioning	General compute + AI inference	HPC + AI training	AI inference + graphics
Process	TSMC 5nm (est.)	Intel 7 + TSMC 5nm	TSMC 4N
Memory	48GB HBM3 (est.)	128GB HBM2e	48GB GDDR6
TDP	~300W (est.)	600W	350W
Launch	2026 (est.)	Jan 2023	Mar 2023

Positioning:

• ✅ General-purpose GPU: Both AI inference and scientific computing (HPC)
• ✅ Low cost: Cheaper than Gaudi 4, targeting NVIDIA L40S
• ✅ Open standards: Supports oneAPI, SYCL, Level Zero

Intel AI Chip Roadmap (2024-2027)​

Time	Product	Type	Process	Note
2024 Q4	Gaudi 3	AI ASIC	TSMC 7nm	Current mainstay
2026 Q2	Crescent Island	General GPU	TSMC 5nm	New launch
2026 Q3	Gaudi 4	AI ASIC	TSMC 5nm	New launch
2027	Jaguar Shores	Datacenter GPU	TSMC 3nm	Next-gen flagship
2027	Gaudi 5 (est.)	AI ASIC	TSMC 3nm	Next-gen

vs Competitors​

Gaudi 4 vs NVIDIA B200​

Metric	Gaudi 4	NVIDIA B200
FP8 compute	~2,000 TFLOPS	4,500 TFLOPS
Memory	64GB HBM3e	192GB HBM3e
Interconnect	Ethernet (RoCE v3)	NVLink 5.0
Software ecosystem	Gaudi Software Suite	CUDA
Price	est. ~$20,000	~$45,000
Advantage	Low Ethernet cost, open	Most mature ecosystem, strongest performance
Disadvantage	Weak software ecosystem, lower compute	Expensive

Conclusion: Gaudi 4 is positioned as a "cost-effective training solution," suited for cost-sensitive customers willing to invest in software adaptation.

Jaguar Shores vs NVIDIA Rubin​

Metric	Jaguar Shores (est.)	NVIDIA Rubin
FP8 compute	~4,000 TFLOPS	~6,000 TFLOPS
Memory	288GB HBM4	288GB HBM4
Software ecosystem	oneAPI	CUDA
Mass production	2027	2026 Q3
Advantage	Open standards, possibly cheaper	Mature ecosystem, first-mover advantage
Disadvantage	Weak ecosystem, 1 year late	Expensive

Conclusion: If Jaguar Shores launches on time with sufficient oneAPI ecosystem improvement, it can become NVIDIA's third choice (after NVIDIA and AMD).

Software Ecosystem: oneAPI Progress and Challenges​

What is oneAPI?​

oneAPI is Intel's open, cross-architecture programming model:

• Supports CPU, GPU, FPGA, AI accelerators
• Based on SYCL standard (similar to CUDA's C++ extensions)
• Open-source implementation (Intel oneAPI Base Toolkit)

Intel AI Stack​

Component	Purpose	Counterpart
oneAPI	Cross-architecture programming model	CUDA
BigDL	Distributed deep learning framework	PyTorch Distributed
Gaudi Software Suite	Gaudi-specific software stack	NVIDIA GPU Cloud (NGC)
Intel Extension for PyTorch	PyTorch optimization on Intel hardware	NVIDIA PyTorch
Intel Optimization for TensorFlow	TensorFlow optimization on Intel hardware	NVIDIA TensorFlow

✅ Progress​

• PyTorch 2.5+: Intel Extension integrated into PyTorch mainline
• Hugging Face Transformers: Official Intel GPU support (via optimum-intel)
• vLLM: Experimental Gaudi support (performance TBD)

⚠️ Challenges​

• Developer habits: Global AI developers use CUDA; oneAPI has a steep learning curve
• Operator coverage: Many PyTorch operators lack oneAPI-optimized versions
• Performance: At same power, Gaudi 4 performance is only ~50% of B200

Industry Impact​

1. Can Intel Return to the AI Race?​

Challenges:

• ❌ Ecosystem disadvantage: CUDA moat too deep, oneAPI hard to shake
• ❌ Performance disadvantage: Gaudi 4 only ~50% of B200
• ❌ Timing disadvantage: Jaguar Shores 1 year later than Rubin

Opportunities:

• ✅ Open standards: Not dependent on CUDA, suited for "anti-NVIDIA-monopoly" customers
• ✅ Ethernet advantage: RoCE v3 cheaper than InfiniBand at ten-thousand-card scale
• ✅ Intel Foundry: If Jaguar Shores uses Intel's own process, lower cost

2. Impact on AMD​

Intel's return to the AI race is bad for AMD:

• AMD was the "only NVIDIA alternative"
• Now Intel is back too; AMD's "alternative" status is challenged
• But in the short term (2026-2027), Intel cannot yet threaten AMD

3. Impact on Domestic Chips​

Intel Gaudi 4's launch is a reference case for domestic chips:

• Proves the Ethernet route (RoCE) is viable
• Proves open ecosystem (oneAPI) is hard but necessary
• Proves the cost-effective route has a market (cost-sensitive customers)

Related Chips​

• Intel Gaudi 3 - Previous-gen product
• Intel Gaudi 4 - New launch (to be created)
• Intel Crescent Island - Intel's first general GPU (to be created)
• NVIDIA B200 - Direct competitor
• AMD MI455X - Same-gen competitor

References​

• Intel Newsroom: Gaudi 4 Launch
• Tom's Hardware: Intel Jaguar Shores to use HBM4
• Wccftech: Intel Next-Gen Jaguar Shores GPU
• U.S. News: Intel Signals Return to AI Race

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This article is compiled from Intel official announcements and public materials. Some specs are estimates, subject to final Intel release.